Examples of such transmission methods are also known by the following abbreviations: FSK (Frequency Shift Keying), PSK (Phase Shift Keying), BPSK (Binary Phase Shift Keying), QPSK (Quaternary Phase Shift Keying), and QAM (Quadrature Amplitude Modulation). The receiver circuits for these methods are known and are generally similar in design. An important constituent is an analog or digital carrier control loop which ensures that a quadrature demodulator operates with the correct phase and frequency. The quadrature demodulator serves to demodulate the quadrature-modulated signal, so that the individual symbols from which the desired data stream can ultimately be reconstructed can be determined via the separated quadrature signal components by means of a symbol recognition device. This requires that the quadrature demodulator in the carrier control loop be operated with the exact phase and frequency so that the two quadrature signal components can be reliably separated.
For receivers of digitally transmitted signals, all-digital circuit technologies are increasingly being used, whose fundamental advantages in terms of stability, reproducibility, immunity to interference, etc. are known. Analog stages are used only where the signal frequencies are too high for digitization. Where the respective interface for the digitization is located depends on a trade-off between the required characteristics and the associated circuit complexity, an important quantity being the necessary digitization frequency, which is generally determined by the system clock used in the receiver, and which is limited by the respective circuit technology employed. For the circuit implementation it is advantageous if the digitization takes place before the carrier control loop, e.g., in the tuner or intermediate-frequency stage, because then the signal processing of the entire carrier control loop is an all-digital one.
The digital quadrature demodulation of the digitized input signal uses a pair of digital conversion signals whose digital value curves are sine- and cosine-shaped. The individual sine and cosine values are formed by a digital oscillator using an overflowing accumulator and a sine and cosine table. The overflow frequency of the digital oscillator is identical with the frequency of the conversion signal pair. The greater the ratio of the system clock frequency to the conversion frequency, the better the frequency accuracy of the overflowing accumulator will be, the resolution being determined essentially by the number of bits of the numerical value to be accumulated and the corresponding number of bits of the accumulator.
To ensure that the mixing process for the demodulation in the quadrature demodulator takes place with the correct phase and frequency, the phase and frequency of the frequency-variable oscillator are controlled by means of a feedback device. To accomplish this, an error detector determines from the outputs of the quadrature demodulator and the subsequent stages phase and frequency deviation values which indicate how far the phase and frequency of the conversion signal pair deviate from the respective desired values. Finally, a control signal for the variable-frequency oscillator is formed. Without this phase-locked control, subsequent assignment of a symbol to a predetermined phase location or phase range would not be possible. As the signals are band-limited and interference or noise signals are superimposed on them, the original punctiform phase location blurs into an areal phase and amplitude range, with the phase limits overlapping one another under unfavorable conditions.
The known advantages of this digital coding are that the original data stream can be easily decoded at the receiver end, with the digital coding being relatively insensitive to interference on the transmission path or in the receiver. Starting from this known prior art, it is an object of the invention to make the receiver end even less sensitive to interference.